1. Field of the Invention
The present invention relates to a data communication system, and more particularly to a data communication system connecting multiple processors without additional hardware.
2. Discussion of Related Art
Lately, a lot of effort has been made to develop a high-performance sensor node for supporting complicated application programs of a wireless sensor network. In general, most sensor nodes use a single processor, and an 8-bit or 16-bit processor (e.g., ATMega128 or MSP430F1611) is mainly used as the single processor because low power consumption is considered as the first requirement. In some sensor nodes requiring high performance, a high-speed 16-bit or 32-bit single chip (e.g., OKI ML67Q5002 of XYZ) is also used.
In the meantime, a sensor node requiring very high performance is designed to use multiple processors. For example, a Low Power Energy Aware Processing (LEAP) sensor node includes MSP430 and PXA270 which are 16-bit processors, and a Power-Aware Sensing Tracking and Analysis (PASTA) sensor node includes 8-bit processors. In a LEAP sensor node, processors are simply connected, and there is no system bus. A PASTA sensor node provides some common interfaces but does not provide a system bus capable of simultaneously connecting a processor with peripheral devices.
As a multi-master serial bus, an inter-integrated circuit (I2C) is an interface currently capable of connecting a processor with devices and ensuring extensibility. However, most peripheral devices used in recent sensor nodes have a serial peripheral interface (SPI) alone, and thus it is difficult to connect a processor with the peripheral devices through the same interface. Also, an I2C interface supports a data transfer rate of 100 kbps in a standard mode, which is ten times or more slower than that of an SPI connection. Furthermore, an I2C interface has high power consumption, and it is difficult to use the I2C interface as a system bus for a low-power high-performance sensor node.